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EOS and ESD
Failures and their Attributes
Electrical Overstress,
or
EOS and ESD
Dielectric or Oxide Punchthrough
Dielectric or
oxide punchthrough refers to the EOS/ESD mechanism involving a voltage
pulse that is large enough to rupture an oxide or
dielectric
layer. This problem is prevalent in MOS circuits because the thin
oxide isolating the gate and the channel of the MOS transistor can
easily be 'punched through' by large voltage spikes. Trends in new
fab processes that lean towards thinner oxide layers also aggravate the
occurrence of this mechanism.
A typical
dielectric punchthrough event may occur in the following stages:
1) a high voltage spike occurs between two pins connected to opposite
sides of a dielectric layer, in effect applying a large potential
difference across the dielectric layer; 2) the breakdown voltage of the dielectric layer is exceeded by the
large potential difference across it; 3) the dielectric breaks down and starts conducting
current; 4) adiabatic or localized heating of the dielectric at the
point of current conduction occurs; and 5) the conduction site melts
down forming a filament that shorts the metal layer above the dielectric
(connected to one of the pins) and the metal layer below the dielectric layer (connected to the other pin).
Figure 1. Photo of an oxide
punchthrough after the
top metal layer has been
removed
Dielectric
punchthrough is minimized by using adequate ESD protection circuits and
prevention of EOS occurrences, such as the inadvertent or random
generation of voltage spikes in the circuit.
Conductor / Resistor
Fusing
The phrase
'Conductor/Resistor Fusing' literally pertains to a
metal line or
resistor that acted as a 'fuse', or one that has become open due to
excessive current. Such melting of a metal or resistor line is often due
to intense heat produced by excessive power dissipation, or
joule heating,
caused by an EOS/ESD event that involves a large current flow through
the conductor or resistor. Conductor/resistor fusing is also
sometimes referred to as 'metal burn-out' or 'resistor burn-out.'
See also:
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