Strip testing offers many benefits, especially in relation to recent advances in semiconductor manufacturing technologies. For instance, one of the major issues addressed by strip testing is the difficulties of handling very small packages (such as the chip scale packages or CSP's) after these have been singulated. 

Very small packages are difficult to handle, process, and test individually. An integrated assembly/test process involving strip testing keep these packages intact in their lead frame strips for majority of the manufacturing steps, eliminating direct handling of the individual units until they are singulated. 

This reduces the occurrence of handling-related issues like bent leads, package cracks, missing units, ESD damage, and the like. Aside from the more protected environment that the strips provide to the units, strips are also much easier to handle and process than individual devices.

Another advantage of strip testing is significant reduction in test cycle time, not only because of its parallel testing capability, but also because of the more efficient matrix indexing scheme that it employs. A single indexing step affects many units, whereas conventional serial processing will only affect a single unit at a time.

Strip testing has also successfully addressed the high cost of testing products that have short life cycles.  This is especially true for CSP's which, strictly speaking, needs to downsize its package dimensions every time the die is shrunk significantly to keep it in scale with the chip's new size, resulting in very short package life cycles.  Short life cycles present a problem in the conventional test process for singulated units, because every significantly new package style and size necessitates the fabrication of a new set of tools and accessories, such as trays and sockets.